Semiconductor memory device and method of manufacturing semiconductor memory device

Abstract

A semiconductor memory device includes: a stack having conductive layers and insulating layers, the conductive layers including a first select gate line connected to a gate of a first select transistor, a word line provided above the first select gate line and connected to a gate of a memory transistor, and a second select gate line provided above the word line and connected to a gate of a second select transistor; a core insulating layer having a top surface lower than a top surface of the second select gate line; a semiconductor layer having a first semiconductor part having channel formation regions of the transistors and a second semiconductor part on the top surface of the core insulating layer; and a memory layer between the semiconductor layer and the stack. The first semiconductor part has an impurity semiconductor region containing an impurity and overlapping with the second select gate line.