Efficient coordination of error handling and usage-based-disturbance mitigation

Abstract

Apparatuses and techniques for efficient handling of data errors and usage-based disturbances are described. To enable efficient utilization of time-limited resources, a memory device includes control circuitry that performs multiple different types of operations responsive to 'confiscating' a refresh-pump time interval. The memory device is responsible for performing various functionalities internally while reducing the impact such functionalities may have on servicing memory requests from an external entity. Accordingly, a memory device may confiscate refresh-pump opportunities and instead perform other operations. To efficiently utilize a refresh-pump opportunity, the control circuitry can perform an error-handling operation on a codeword stored in a first bank and perform a usage-based disturbance mitigation operation on a row in a second bank during the confiscated time interval. Further, the usage-based disturbance mitigation operation can be performed across multiple banks except for the first bank. In this manner, various internal functionalities can be achieved efficiently.