The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Jul. 31, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Nitul Gohain, Bangalore, IN;

Chao-Han Cheng, San Jose, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1004 (2013.01);
Abstract

Methods, systems, and devices for program failure handling in non-volatile memory systems are described. The memory system may identify a program failure associated with writing data to a first address of a first block of memory cells. The memory system may move data from the first block to a second block of memory cells based on identifying the program failure at the first address. The memory system may alter the data stored to the second block to include an uncorrectable error after moving the data from the first block. The memory system may perform a redundant array of independent NAND (RAIN) operation on the altered data stored to the second block. In some examples, the RAIN operation may include correcting the uncorrectable error stored to the second block and moving the data from the second block to a third block of memory cells.


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