Loopback test for phase interpolator codes

Abstract

Loopback testing of a phase interpolator (PI) in a serial link system. A CDR loop operates in a loopback mode until a sampling clock signal locks to a first valid lock point in a first UI. The CDR loop includes the PI and a phase blender for blending weights of multiple clock signals, phase offset from each other, to apply a blender delay to the sampling clock signal. The PI phase code is stored, and the sampled loopback signal is checked for bit errors. The blender delay is repeatedly adjusted to phase shift the sampling clock signal, locking the sampling clock signal with the CDR loop, and checking for bit errors of the loopback signal, such that the blender delay sweeps across at least one UI. For each further UI, the PI phase code is adjusted to target a further valid lock point, and the blender delay is swept.