The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

Aug. 01, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hwanjoo Park, Suwon-si, KR;

Sunggu Kang, Suwon-si, KR;

Jaechoon Kim, Suwon-si, KR;

Taehwan Kim, Suwon-si, KR;

Sungho Mun, Suwon-si, KR;

Jonggyu Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/685 (2026.01); H10W 40/22 (2026.01); H10W 90/00 (2026.01); H10W 74/00 (2026.01); H10W 90/20 (2026.01);
U.S. Cl.
CPC ...
H10W 70/685 (2026.01); H10W 40/22 (2026.01); H10W 90/00 (2026.01); H10W 90/701 (2026.01); H10W 74/00 (2026.01); H10W 90/288 (2026.01); H10W 90/722 (2026.01); H10W 90/724 (2026.01); H10W 90/732 (2026.01); H10W 90/734 (2026.01);
Abstract

A semiconductor package includes a first redistribution structure, a first semiconductor package on the first redistribution structure, the first semiconductor package including a first semiconductor chip which includes a first device layer and a first semiconductor substrate including a through electrode, a second semiconductor chip which is on the first semiconductor chip and includes a second device layer and a second semiconductor substrate, and a molding member surrounding the first semiconductor chip, a second redistribution structure on an upper surface of the molding member, and a second semiconductor package on the second redistribution structure, the second semiconductor package including a third semiconductor chip, wherein the second semiconductor chip is apart from the second semiconductor package in a horizontal direction, and an upper surface of the second semiconductor chip is higher than the upper surface of the molding member.


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