The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

Aug. 03, 2023
Applicant:

Changxin Memory Technologies, Inc., Hefei City, CN;

Inventor:

Shuai Guo, Hefei City, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/43 (2026.01); H10P 50/00 (2026.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/43 (2026.01); H10P 50/691 (2026.01); H10P 50/73 (2026.01); H10W 20/056 (2026.01); H10W 20/075 (2026.01); H10W 20/076 (2026.01);
Abstract

The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure, and relates to the technical field of semiconductors. The manufacturing method of a semiconductor structure includes: providing a substrate, and forming a stacked structure on the substrate; forming a hard mask layer on the stacked structure, where the hard mask layer includes a first etched window, and the first etched window exposes part of a top surface of the stacked structure; forming a photoresist layer, where the photoresist layer covers the first etched window; and trimming the photoresist layer for a plurality of times, after each trimming of the photoresist layer, etching the stacked structure according to a trimmed photoresist layer, and forming a plurality of steps in the stacked structure along a direction away from the substrate.


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