The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2026
Filed:
Dec. 07, 2022
International Business Machines Corporation, Armonk, NY (US);
Albert M. Chu, Nashua, NH (US);
Nicholas Anthony Lanzillo, Wynantskill, NY (US);
Albert M. Young, Fishkill, NY (US);
Junli Wang, Slingerlands, NY (US);
Brent A. Anderson, Jericho, VT (US);
Ruilong Xie, Niskayuna, NY (US);
Lawrence A. Clevenger, Saratoga Springs, NY (US);
Reinaldo Vega, Mahopac, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor structure is presented having a plurality of circuit rows, a plurality of first power rails positioned on front sides of the plurality of circuit rows, a plurality of second power rails positioned on back sides of the plurality of circuit rows, and power tap cells associated with each the plurality of circuit rows, wherein each of the power tap cells includes one or more power vias connecting at least one first power rail of the plurality of first power rails to at least one second power rail of the plurality the second power rails. In one instance, the plurality of second power rails are orthogonal to the plurality of first power rails. in another instance, the plurality of first power rails are horizontally offset from the plurality of second power rails. The one or more power vias include at least two or more different sized power vias.