Vertical gate-all-around (gaa) memory cell and method for forming the same

Abstract

Various embodiments of the present disclosure are directed to a vertical gate-all-around (GAA) memory cell. A middle conductor overlies a lower conductor and decreases in width towards the lower conductor to culminate in a point spaced from the lower conductor. An insulator structure is between the lower conductor and the middle conductor. A semiconductor channel overlies the middle conductor, and a gate electrode laterally surrounds the semiconductor channel on a sidewall of the semiconductor channel. A gate dielectric layer separates the gate electrode from the semiconductor channel, and an upper conductor overlies the semiconductor channel. The lower and middle conductors and the insulator structure correspond to a resistor, whereas the middle conductor, the upper conductor, the gate electrode, the gate dielectric layer, and the semiconductor channel correspond to a transistor atop the resistor.