Memory devices and operating methods thereof, memory systems, and sensing circuits

Abstract

Examples of the present application provide a memory device and operating method thereof, a memory system, and a sensing circuit. Wherein the memory device includes: an array of memory cells; a first sensing circuit coupled to the array of memory cells through a first pair of data lines; a second sensing circuit coupled to the first pair of data lines through a second pair of data lines; an isolation circuit located between the first pair of data lines and the second pair of data lines; a control circuit configured to: in the first sensing phase, control the first sensing circuit to amplify the data signal to the first sensing signal, and control the isolation circuit to connect the first pair of data lines and the second pair of data lines.