Semiconductor package structure having interposer substrate, and stacked semiconductor package structure including the same

Abstract

A semiconductor package structure includes a semiconductor chip on a package substrate; a lower connection bump on the package substrate; and an interposer substrate on the lower connection bump on the package substrate and an upper surface of the semiconductor chip. The semiconductor package structure includes an upper connection bump on a lower surface of the interposer substrate; and a support structure on a lower surface of the interposer substrate, spaced apart from the upper connection bump to provide support between the package substrate and the interposer substrate. The upper connection bump and the lower connection bump constitute a connection bump structure, and the support structure includes a metal core ball and a ball cover layer surrounding the metal core ball, wherein the ball cover layer is formed to gradually decrease in thickness in a direction from the interposer substrate to the package substrate cross-section.