The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2026
Filed:
Feb. 29, 2024
Alpha and Omega Semiconductor International Lp, Toronto, CA;
Jian Wang, Portland, OR (US);
Lei Zhang, Portland, OR (US);
Changqing Zhan, Vancouver, WA (US);
Tai-Ming Lin, Alhambra, CA (US);
ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP, Toronto, CA;
Abstract
A method comprises the steps of providing a semiconductor wafer comprising a substrate layer; forming a first alignment mark and a second alignment mark; forming a plurality of super junction buffer regions; forming additional two or more epitaxial layers; forming additional one or more alignment marks; forming a top layer; thinning the wafer; forming a first plurality of regions and a second plurality of regions; and applying a singulation process. Devices made by the method have reduced misalignment, between a top portion and a bottom portion of an interface within the devices, for less than 0.5 micron.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile