The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Dec. 17, 2021
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Priyal Shah, Santa Clara, CA (US);

Raja Swaminathan, Austin, TX (US);

Brett P. Wilkerson, Austin, TX (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 40/00 (2026.01); H10W 40/22 (2026.01); H10W 40/25 (2026.01); H10W 40/70 (2026.01); H10W 74/01 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 40/037 (2026.01); H10W 40/22 (2026.01); H10W 40/251 (2026.01); H10W 40/70 (2026.01); H10W 74/016 (2026.01); H10W 90/00 (2026.01);
Abstract

Structural thermal interfacing for lidded semiconductor packages, including: applying, to a periphery of a surface of a chip, a stiffening adhesive framing a center portion of the chip; applying, to the center portion of the chip, a thermal interface material; and applying a lid to the chip, wherein the lid contacts the stiffening adhesive and is thermally coupled to the chip via the thermal interface material after application to the chip.


Find Patent Forward Citations

Shah, Priyal. (2026). Structural thermal interfacing for lidded semiconductor packages (U.S. Patent No. 12721159). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12721159

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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