The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Jan. 04, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Szu-Ying Chen, Miaoli County, TW;

Yu-Min Liao, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10F 39/00 (2025.01); H10F 39/18 (2025.01);
U.S. Cl.
CPC ...
H10F 39/80373 (2025.01); H10F 39/014 (2025.01); H10F 39/182 (2025.01); H10F 39/807 (2025.01); H10F 39/811 (2025.01);
Abstract

A CIS has a monolithic transfer gate electrode embedded in the semiconductor substrate. In some embodiments, the transfer gate electrode is below the surface. In some embodiments, the top of the transfer gate electrode is nearly even with or below a bottom of a floating diffusion region. In some embodiments, the transfer gate electrode wraps partially around the area of the floating diffusion region. In some embodiments, the transfer gate electrode wraps entirely around the area of the floating diffusion region. Embedding the transfer gate in the substrate reduces surface crowding and allows a scale reduction. The wrapping of the transfer gate electrode around the area of the floating diffusion region increases the area of the transfer gate channel while limiting the area that is occupied by the transfer gate.


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