The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2026
Filed:
May. 10, 2023
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Hyuncheol Kim, Suwon-si, KR;
Yongseok Kim, Suwon-si, KR;
Kiheun Lee, Suwon-si, KR;
Daewon Ha, Suwon-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 51/30 (2023.01); H10B 51/10 (2023.01); H10D 30/69 (2025.01); H10D 64/01 (2025.01); H10D 64/27 (2025.01); H10D 64/68 (2025.01);
U.S. Cl.
CPC ...
H10B 51/30 (2023.02); H10B 51/10 (2023.02); H10D 30/701 (2025.01); H10D 64/033 (2025.01); H10D 64/514 (2025.01); H10D 64/68 (2025.01); H10D 64/681 (2025.01); H10D 64/685 (2025.01); H10D 64/689 (2025.01);
Abstract
A memory device includes a channel region, a conductive electrode on the channel region, and a data storage structure between the channel region and the conductive electrode. The data storage structure includes a stack structure including two-dimensional material layers and ferroelectric layers stacked alternately and repeatedly in a direction perpendicular to a surface of the channel region. A thickness of each of the ferroelectric layers is greater than a thickness of each of the two-dimensional material layers.