The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Jul. 08, 2024
Applicant:

Amphenol Corporation, Wallingford, CT (US);

Inventors:

Marc B. Cartier, Jr., Durham, NH (US);

Mark W. Gailus, Concord, MA (US);

David Levine, Amherst, NH (US);

Vysakh Sivarajan, Nashua, NH (US);

Assignee:

Amphenol Corporation, Wallingford, CT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/02 (2006.01); H05K 3/40 (2006.01);
U.S. Cl.
CPC ...
H05K 1/116 (2013.01); H05K 1/0296 (2013.01); H05K 3/4038 (2013.01); H05K 2201/09636 (2013.01);
Abstract

A printed circuit board includes: a plurality of layers including attachment layers and routing layers; and via patterns formed in one or more of the plurality of layers, each of the via patterns including: first and second signal vias configured to accept contact tails of signal conductors of a connector; ground vias configured to accept contact tails of ground conductors of the connector; ground shadow vias located adjacent to each of the first and second signal vias; and non-plated holes located between each of the ground shadow vias and the signal vias. Different layers of the plurality of layers may have different antipad configurations.


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