The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Sep. 24, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Hubert C. George, Portland, OR (US);

Ravi Pillarisetty, Portland, OR (US);

James S. Clarke, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06N 10/40 (2022.01); B82Y 30/00 (2011.01);
U.S. Cl.
CPC ...
G06N 10/40 (2022.01); B82Y 30/00 (2013.01);
Abstract

Quantum dot devices with alternating layouts of read devices associated with a single active row of qubits and, optionally, with one or more screening gates, are disclosed. An example quantum dot device with an alternating layout includes a first read device on one side of an active row, proximate a first portion of the active row, to detect/read quantum states of a first subset of qubits of the active row; and further includes a second read device on the other side of the active row, proximate a second portion of the active row, to detect/read quantum states of a second subset of qubits of the active row. Screening gates may be provided between various gates coupled to the read devices and the active row, to control electrostatics between the qubits of the active row and the read devices, and between different read devices.


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