The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2026
Filed:
Sep. 29, 2022
Altera Corporation, San Jose, CA (US);
Rahul Pal, Bangalore, IN;
Ashish Gupta, San Jose, CA (US);
Gary Wallichs, San Jose, CA (US);
Sreedhar Ravipalli, Cupertino, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
The present disclosure is directed to enabling operation of a field programmable gate array (FPGA) while preventing application quiescence during FPGA reconfiguration. In embodiments of the disclosure, proxy agent firmware may enable downstream transactions (e.g., PCIe transactions) to be serviced during reconfiguration of the FPGA. Programmable logic states (e.g., PCIe configuration states or memory-mapped input/output (MMIO) states) are saved in memory and maintained by the proxy agent (via a management controller running the proxy agent). Once the FPGA is reconfigured, the state may be restored to the FPGA's programmable logic, and the FPGA may operate on the current state of the transactions.