The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

May. 02, 2023
Applicant:

Semiconductor Components Industries, Llc, Scottsdale, AZ (US);

Inventors:

Yong Liu, Cumberland Foreside, ME (US);

Liangbiao Chen, Scarborough, ME (US);

Chee Hiong Chew, Seremban, MY;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 74/01 (2026.01); H10P 95/90 (2026.01); H10W 40/25 (2026.01); H10W 70/40 (2026.01); H10W 74/00 (2026.01); H10W 74/15 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 74/016 (2026.01); H10P 95/90 (2026.01); H10W 40/255 (2026.01); H10W 70/468 (2026.01); H10W 74/012 (2026.01); H10W 74/15 (2026.01); H10W 74/00 (2026.01); H10W 90/751 (2026.01); H10W 90/763 (2026.01);
Abstract

A high-power semiconductor device module is implemented with a cavity in the molding package. The cavity reduces a volume of the molding compound, preventing an accumulation of stress in the module, and associated warpage of the package. Chip assemblies within the module are designed to fit within the cavity, so that semiconductor dies, and sensing devices therein are protected from damage during a sintering process in which the module is mounted to a heat sink. After the sintering process, the cavity can be sealed with a gel material. The molding package described herein can also enhance reliability of the module during operation, ensuring that the product is robust for electric and hybrid electric vehicle applications.


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