The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Jun. 21, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Bradley Glasscock, Forney, TX (US);

Makarand Kulkarni, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 70/04 (2026.01); H10W 70/40 (2026.01); H10W 70/65 (2026.01); H10W 72/00 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/042 (2026.01); H10W 70/047 (2026.01); H10W 70/479 (2026.01); H10W 70/65 (2026.01); H10W 74/016 (2026.01); H10W 74/111 (2026.01); H10W 72/01235 (2026.01); H10W 72/879 (2026.01); H10W 90/726 (2026.01); H10W 90/756 (2026.01);
Abstract

A method of fabricating an electronic device includes depositing a metal layer having external leads on a carrier. A photoresist material layer is patterned on the leads. A dielectric layer is formed over the metal layer such that surfaces of metal pillars from the metal layer are exposed. The photoresist material layer is removed from the leads, and the dielectric layer and the metal layer are removed from the carrier. A die is attached to the first surface of the dielectric layer. The die includes contacts on a surface of the die that contacts the dielectric layer such that the contacts are aligned with and connect to the exposed surfaces of the metal pillars. A mold compound is formed over the die, the dielectric layer, the metal traces, and the metal pillars of the metal layer, but not over the leads of the metal layer.


Find Patent Forward Citations

Glasscock, Bradley. (2026). Integrated circuit having a routable leadframe (U.S. Patent No. 12707986). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12707986

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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