The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2026
Filed:
Aug. 20, 2022
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventor:
Jen-Yuan Chang, Hsinchu City, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/50 (2025.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10D 62/50 (2025.01); H10W 90/00 (2026.01); H10W 90/732 (2026.01);
Abstract
A semiconductor structure includes a die structure including: a substrate having a sidewall; a dielectric disposed over the substrate; an interconnect structure disposed within the dielectric; and a capping member surrounding the die structure, wherein the sidewall of the substrate includes a plurality of recesses extending into the substrate, and each of the plurality of recesses surrounds at least a portion of the capping member.
Quick Actions:
Chang, Jen-Yuan. (2026). Semiconductor structure with roughened sidewall and method of manufacturing thereof (U.S. Patent No. 12707688). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12707688
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile