The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Mar. 15, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chia-Hao Pao, Kaohsiung City, TW;

Kian-Long Lim, Hsinchu City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 10/00 (2023.01); H10B 80/00 (2026.01); H10W 20/20 (2026.01); H10W 20/41 (2026.01); H10W 20/42 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10B 10/125 (2023.02); H10B 80/00 (2023.02); H10W 20/20 (2026.01); H10W 20/42 (2026.01); H10W 20/435 (2026.01); H10W 90/00 (2026.01);
Abstract

One aspect of the present disclosure pertains to a memory device. The device includes a substrate having a first region and a second region adjacent the first region. A first SRAM cell is disposed within the first region, the first SRAM cell having first active regions extending lengthwise along a first direction on the substrate. A second SRAM cell is disposed within the second region, the second SRAM cell having second active regions extending lengthwise along the first direction on the substrate. Frontside metal lines are disposed over the first and second active regions, the frontside metal lines including a first bit line and a first bit line bar within the first region. And backside metal lines are under the first and second active regions, the backside metal lines having a second bit line and a second bit line bar within the second region.


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