Memory device for read voltage determination, and related memory system and memory controller

Abstract

Examples of the present disclosure disclose a memory device, a memory system, a memory controller, and a method. The memory device may include a memory cell array with a plurality of memory cells. The memory device may include peripheral circuit coupled with the memory cell array and configured to: perform M first adjustments on a target read voltage of at least one code word with a first step, and acquire M first results corresponding to M read voltages obtained after the M first adjustments respectively; take the minimum first result in the M first results as an inflection point value; perform N second adjustments on the inflection point voltage with a second step, and acquire N first results corresponding to N read voltages obtained after the N second adjustments respectively; and determine a target valley bottom voltage according to the acquired N first results.