The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2026
Filed:
Oct. 16, 2025
Sicily Merger Sub Ii, Inc., Santa Clara, CA (US);
Ankur Aggarwal, Pleasanton, CA (US);
Suresh Venkata Pothukuchi, Chandler, AZ (US);
Subal Sahni, La Jolla, CA (US);
Sicily Merger Sub II, Inc., Santa Clara, CA (US);
Abstract
System in package (SiP) architectures using stitched reticle photonic integrated circuits (PICs), including a multi-die interconnect bridge (OMIB), are disclosed along with corresponding fabrication processes. A stitched multi-reticle OMIB provides an optically-enabled bridge between semiconductor dies referred to generally as XPUs where 'X' is a variable representing a wide range of specialized processing units. The optically-enabled bridge enables high-speed, low-latency, and power-efficient communications using light to meet the bandwidth demands of modern artificial intelligence (AI) workloads. The disclosed SiP architectures use stacked arrangements in which the OMIBs are located directly under heat-producing elements of the XPUs. By using temperature-stable optical modulation elements, optical chip-to-chip (oC2C) interconnects between the OMIB and XPUs are able to be located at the point of compute in the XPUs without requiring access to the limited “beachfront” of the die that are utilized for electrical chip-to-chip (eC2C) interconnects.