The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2026
Filed:
Oct. 27, 2021
Applicant:
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Inventors:
Rahul Agarwal, Santa Clara, CA (US);
Raja Swaminathan, Austin, TX (US);
Assignee:
ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/00 (2006.01); H10W 20/20 (2026.01); H10W 70/60 (2026.01); H10W 72/00 (2026.01); H10W 74/10 (2026.01); H10W 80/00 (2026.01); H10W 90/00 (2026.01); H01L 23/31 (2006.01); H01L 25/16 (2023.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 20/20 (2026.01); H10W 70/60 (2026.01); H10W 74/111 (2026.01); H10W 72/07236 (2026.01); H10W 80/312 (2026.01); H10W 80/327 (2026.01); H10W 90/728 (2026.01); H10W 90/798 (2026.01);
Abstract
A three-dimensional semiconductor package assembly includes a die. The die includes a plurality of through silicon vias (TSVs). The TSVs includes a first TSV and a second TSV. The first TSV supplies power from an active surface of the die to a back surface of the die. The assembly also includes a passive device coupled to the back surface of the die such that conductive contacts of the passive device electrically interface with the TSVs. The first passive device receives power through the first TSV and supplies power to the first die through the second TSV.