The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2026
Filed:
May. 08, 2023
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Jimin Choi, Suwon-si, KR;
Joongwon Shin, Suwon-si, KR;
Sungyun Woo, Suwon-si, KR;
Yeonjin Lee, Suwon-si, KR;
Jongmin Lee, Suwon-si, KR;
Sehyun Hwang, Suwon-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10B 80/00 (2023.01); H10W 46/00 (2026.01); H10W 90/20 (2026.01);
U.S. Cl.
CPC ...
H10W 46/00 (2026.01); H10B 80/00 (2023.02); H10W 90/00 (2026.01); H10W 46/301 (2026.01); H10W 90/291 (2026.01); H10W 90/722 (2026.01);
Abstract
A semiconductor device may include a plurality of chip regions on a substrate, at least one scribe lane surrounding each of the plurality of chip regions on the substrate, a plurality of first align key patterns and a plurality of first test element group patterns included in the plurality of chip regions, and a plurality of second align key patterns and a plurality of second test element group patterns included in the at least one scribe lane.