The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2026
Filed:
May. 01, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
National Yang Ming Chiao Tung University, Hsinchu City, TW;
Hsin-Cheng Lin, Taipei City, TW;
Yi-Chun Liu, Taichung City, TW;
Kung-Ying Chiu, Taoyuan City, TW;
Chee-Wee Liu, Taipei City, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
NATIONAL YANG MING CHIAO TUNG UNIVERSITY, Hsinchu City, TW;
Abstract
An integrated circuit structure includes a substrate, a bottom nanostructure transistor, and a top nanostructure transistor. The bottom nanostructure transistor is over the substrate and includes a first channel layer, a first gate structure, and first source/drain epitaxial structures. The first gate structure wraps around the first channel layer. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The top nanostructure transistor is over the bottom nanostructure transistor and includes a second channel layer, a second gate structure, and second source/drain epitaxial structures. The second channel layer is over the first channel layer. The second gate structure wraps around the second channel layer. A bottom surface of the second gate structure is substantially coplanar with a bottom surface of the first gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer.