The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

May. 09, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Jaspal Singh Shah, Hsinchu, TW;

Atul Katoch, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/18 (2006.01); G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
G11C 8/18 (2013.01); G06F 1/08 (2013.01);
Abstract

A memory device includes a plurality of memory cells arranged in an array, a first clock generator connected to the plurality of memory cells and configured to generate a local clock signal to be provided to the plurality of memory cells, a second clock generator connected to an input/output interface connected to the plurality of memory cells, the second clock generator configured to generate a global clock signal to be provided to the input/output interface, and one or more logic gates connected to at least one of the first clock generator or the second clock generator, wherein the one or more logic gates allow the local clock signal and the global clock signal to be output independently.


Find Patent Forward Citations

Shah, Jaspal. (2026). Method, device, and circuit for high-speed memories (U.S. Patent No. 12700442). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12700442

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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