The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Mar. 18, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Jing-Cheng Lin, Chu Tung Zhen, TW;

PO-Hao Tsai, Zhongli City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 72/00 (2026.01); B23K 1/00 (2006.01); B23K 101/42 (2006.01); H10W 20/00 (2026.01); H10W 70/63 (2026.01); H10W 70/65 (2026.01); H10W 72/20 (2026.01); H10W 72/29 (2026.01); H10W 72/90 (2026.01); H10W 74/15 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 72/073 (2026.01); B23K 1/0016 (2013.01); H10W 20/023 (2026.01); H10W 70/65 (2026.01); H10W 72/20 (2026.01); H10W 90/701 (2026.01); B23K 2101/42 (2018.08); H10W 70/635 (2026.01); H10W 72/01235 (2026.01); H10W 72/01255 (2026.01); H10W 72/019 (2026.01); H10W 72/072 (2026.01); H10W 72/222 (2026.01); H10W 72/227 (2026.01); H10W 72/241 (2026.01); H10W 72/252 (2026.01); H10W 72/29 (2026.01); H10W 72/923 (2026.01); H10W 72/9415 (2026.01); H10W 72/952 (2026.01); H10W 74/15 (2026.01); H10W 90/724 (2026.01); H10W 90/734 (2026.01);
Abstract

A method of making a semiconductor device includes patterning a photoresist on a substrate to form a plurality of openings. A first opening has a first width, a second opening has a second width, smaller than the first width, and a third opening is between the first opening and the second opening and has a third width, different from the first width and the second width. The width is measured in a direction parallel to a top surface of the substrate. The method further includes plating a first conductive material into each opening of the plurality of openings in the photoresist. Plating the first conductive material includes plating of the first conductive material to a first height in the first opening, plating the first conductive material to a second height in the second opening, and plating the first conductive material to a third height in the third opening.


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