The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Sep. 11, 2023
Applicant:

Sumitomo Electric Device Innovations, Inc., Yokohama, JP;

Inventor:

Makoto Nishihara, Yokohama, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 44/20 (2026.01); H10D 84/05 (2025.01); H10D 88/00 (2026.01); H10W 70/40 (2026.01); H10W 72/00 (2026.01); H10W 72/30 (2026.01); H10W 72/50 (2026.01); H10W 72/90 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 44/20 (2026.01); H10D 84/05 (2025.01); H10D 88/00 (2025.01); H10W 70/475 (2026.01); H10W 72/537 (2026.01); H10W 90/00 (2026.01); H10W 44/234 (2026.01); H10W 72/07352 (2026.01); H10W 72/07354 (2026.01); H10W 72/07553 (2026.01); H10W 72/07554 (2026.01); H10W 72/327 (2026.01); H10W 72/347 (2026.01); H10W 72/5445 (2026.01); H10W 72/5453 (2026.01); H10W 72/547 (2026.01); H10W 72/5473 (2026.01); H10W 72/5475 (2026.01); H10W 72/5522 (2026.01); H10W 72/865 (2026.01); H10W 72/884 (2026.01); H10W 72/921 (2026.01); H10W 72/926 (2026.01); H10W 72/932 (2026.01); H10W 72/934 (2026.01); H10W 72/944 (2026.01); H10W 72/952 (2026.01); H10W 90/736 (2026.01); H10W 90/738 (2026.01); H10W 90/755 (2026.01); H10W 90/758 (2026.01); H10W 90/759 (2026.01);
Abstract

A semiconductor device includes a semiconductor chip including a substrate, a transistor provided on an upper surface of the substrate and having an input electrode to which a high frequency signal is input, an output electrode from which the high frequency signal is output, and a reference potential electrode to which a reference potential is supplied, and a metal pattern provided on the upper surface of the substrate and electrically connected to the reference potential electrode, a first capacitor including a first lower electrode provided on the metal pattern and electrically connected to the metal pattern, a first dielectric layer provided on the first lower electrode, and a first upper electrode provided on the first dielectric layer, and a first bonding wire electrically connecting the first upper electrode and a first electrode which is any one of the input electrode and the output electrode.


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