The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2026
Filed:
Nov. 11, 2022
Xilinx, Inc., San Jose, CA (US);
James D. Wesselkamper, Albuquerque, NM (US);
Thomas Paul Leboeuf, Sandia Park, NM (US);
Steve E. Mcneil, Los Ranchos, NM (US);
Jason J. Moore, Albuquerque, NM (US);
James Anderson, Madison, AL (US);
XILINX, INC., San Jose, CA (US);
Abstract
Stacked integrated circuit devices, chip packages and methods for operating a chip package are described herein that provide an increased level of backside protection from physical attacks that could compromise confidentiality or authentication of the integrated circuit device. In one example, a chip stack includes a sacrificial integrated circuit (IC) die stacked with a primary IC die. The sacrificial IC die includes a first split key information source. The primary IC die has security circuitry configured to generate an encryption key based at least in part on first split key information transmitted from the sacrificial IC die across a die-to-die interface to the primary IC die. Separation of the dies to probe or modify of the primary IC die would cause the destruction of split key information required to operate the functional circuitry of the primary IC die.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile