The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Sep. 27, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Juan Fang, Portland, OR (US);

Danny Alexander, Neve Efraim Monoson, IL;

Laurent Cariou, Milizac, FR;

Qinghua Li, San Ramon, CA (US);

Robert Stacey, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 5/00 (2006.01);
U.S. Cl.
CPC ...
H04L 5/0064 (2013.01); H04L 5/0053 (2013.01);
Abstract

This disclosure describes systems, methods, and devices related to low latency preemption. A device may establish time gaps between consecutive physical layer (PHY) convergence protocol data units (PPDUs) to facilitate preemption opportunity for low latency (LL) transmission. The device may detect a suspend/resource request (SR) transmitted over predefined null tones, wherein the SR is received from a station device (STA). The device may determine if a current transmit opportunity (TXOP) is preemptable and communicate this status through a control frame. The device may set a suspend request (SR) feedback report support subfield within an ultra high reliability (UHR) capabilities element based on a capability to support the SR feedback report.


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