The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2026

Filed:

Jun. 30, 2022
Applicants:

Hefei Boe Ruisheng Technology Co., Ltd., Hefei, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Ningyu Luo, Beijing, CN;

Zouming Xu, Beijing, CN;

Xintao Wu, Beijing, CN;

Jie Wang, Beijing, CN;

Jiawei Xu, Beijing, CN;

Tingwei Han, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10H 20/857 (2025.01); H10W 90/00 (2026.01); H10H 20/01 (2025.01);
U.S. Cl.
CPC ...
H10H 20/857 (2025.01); H10W 90/00 (2026.01); H10H 20/0364 (2025.01);
Abstract

A method of allocating widths for target signal lines, a wiring substrate, a light-emitting substrate and a display device are provided. The method includes numbering the target signal lines; performing the following operations at least once until the number of target signal lines in a set is zero, determining the set of target signal lines; determining a region R based on the conditions satisfied by a voltage drop V, a temperature rise T, and widths W of the target signal lines, determining the number i of the target signal line with the maximum voltage drop in the set; substituting a known length Lof the target signal line numbered i into V (L, W) to obtain V (L, W) and obtaining Wbased on an intersection of V (L, W) and a boundary of the region R, and removing the target signal line with the width Wfrom the set.


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