The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2026

Filed:

May. 16, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yu-Lien Huang, Jhubei City, TW;

Tung Ying Lee, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 62/00 (2026.01); H10D 62/83 (2025.01); H10D 64/01 (2025.01); H10D 64/62 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10P 50/28 (2026.01); H10P 50/64 (2026.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 62/021 (2025.01); H10D 62/83 (2025.01); H10D 64/0112 (2026.01); H10D 64/017 (2025.01); H10D 64/62 (2025.01); H10D 84/0149 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01); H10P 50/283 (2026.01); H10P 50/642 (2026.01); H10W 20/069 (2026.01); H10W 20/033 (2026.01); H10W 20/047 (2026.01);
Abstract

An integrated circuit structure includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, with the insulation regions including first top surfaces and second top surfaces lower than the first top surfaces, a semiconductor fin over the first top surfaces of the insulation regions, a gate stack on a top surface and sidewalls of the semiconductor fin, and a source/drain region on a side of the gate stack. The source/drain region includes a first portion having opposite sidewalls that are substantially parallel to each other, with the first portion being lower than the first top surfaces and higher than the second top surfaces of the insulation regions, and a second portion over the first portion, with the second portion being wider than the first portion.


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