The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2026
Filed:
May. 31, 2024
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Channappa Desai, Haveri, IN;
Sunil Sharma, Bangalore, IN;
Anne Srikanth, Bangalore, IN;
Sherin Bose, Bangalore, IN;
Pradeep Jayadev Kodlipet, Bangalore, IN;
Biju Manakkam Veetil, Bengaluru, IN;
Rahul Biradar, Kalaburgi, IN;
Sung Son, San Jose, CA (US);
Manjeet Singh Lowanshi, Bangalore, IN;
Kamlesh Kumar, Bangalore, IN;
Assignee:
QUALCOMM INCORPORATED, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
H10B 10/18 (2023.02); G11C 5/146 (2013.01);
Abstract
A memory includes a periphery separated from one or more banks by a bitcell-to-periphery interface. The periphery includes logic circuits for the reading and writing to bitcells within the neighboring banks. Tap cells for the biasing of the periphery extend across the bitcell-to-periphery interface.