The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Dec. 15, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jonggyu Lee, Suwon-si, KR;

Sunggu Kang, Suwon-si, KR;

Jaechoon Kim, Suwon-si, KR;

Taehwan Kim, Suwon-si, KR;

Hwanjoo Park, Suwon-si, KR;

Kyungsuk Oh, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 40/47 (2026.01); H10W 70/60 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 40/47 (2026.01); H10W 70/611 (2026.01); H10W 74/117 (2026.01); H10W 90/00 (2026.01); H10W 90/401 (2026.01);
Abstract

A semiconductor package includes a package substrate; an interposer on the package substrate; a first semiconductor chip on the interposer; at least one second semiconductor chip on the interposer; a molding layer extending around the first semiconductor chip and the at least one second semiconductor chip; a barrier layer on the upper surface of the molding layer; a separation wall on the barrier layer, the separation wall configured to define a first cooling space adjacent the first semiconductor chip and a second cooling space adjacent the at least one second semiconductor chip; and a heat dissipation structure on the separation wall, wherein the heat dissipation structure provides a cooling channel through which the cooling fluid flows.


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