Wire structure for low resistance interconnects

Abstract

Interconnect wire structures and techniques for fabrication thereof with uniform line profile and height are provided. In one aspect, a structure is provided that includes: a wafer; a first interlayer dielectric disposed on the wafer; a second interlayer dielectric disposed on the first interlayer dielectric; and an interconnect wire(s) embedded in the first interlayer dielectric and the second interlayer dielectric, where a first portion of a top half of the interconnect wire(s) has vertical sidewalls, and where a second portion of the top half of the interconnect wire(s) and a bottom half of the interconnect wire(s) have flared sidewalls. A first barrier layer and a (potentially different) second barrier layer can separate the bottom half and top half of the interconnect wire(s) from the first and second interlayer dielectrics. A method for forming the interconnect wire(s) is also provided.