The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Sep. 22, 2023
Applicant:

Winbond Electronics Corp., Taichung City, TW;

Inventors:

PO-Yen Hsu, Taichung City, TW;

Bo-Lun Wu, Taichung City, TW;

Tse-Mian Kuo, New Taipei City, TW;

Assignee:

WINBOND ELECTRONICS CORP., Taichung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/68 (2025.01); H10B 41/30 (2023.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10D 30/6891 (2025.01); H10B 41/30 (2023.02); H10W 20/075 (2026.01);
Abstract

A semiconductor structure and a method of forming the same are provided. The semiconductor structure includes a substrate, a floating gate, a dielectric stack, a control gate, and a protective layer. The substrate includes an active region and a peripheral region. The floating gate is disposed on the substrate. The dielectric stack is disposed on the floating gate. The control gate is disposed on the dielectric stack. The protective layer is disposed on the control gate. The protective layer located in the active region has a stepped portion.


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