Topology-based dynamic address assignment of semiconductor memory devices

Abstract

Disclosed are methods, systems, and apparatuses for a topology-based dynamic address assignment (DAA) of semiconductor memory devices (e.g., dynamic random access memory (DRAM)). The memory devices may be connected via a daisy chain arrangement that forms a sideband bus. During a DAA process, the topology-based DAA assigns addresses to the memory devices based on their placement on the daisy chain (e.g., their placement within the topology of the sideband bus). The topology-based DAA described herein may facilitate predictably assigning dynamic addresses to memory devices based on, for example, their position on a memory module.