The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2026
Filed:
Oct. 10, 2023
Alpha and Omega Semiconductor International Lp, Toronto, CA;
Yan Xun Xue, Los Gatos, CA (US);
Madhur Bobde, Sunnyvale, CA (US);
Long-Ching Wang, Cupertino, CA (US);
Jian Yin, San Ramon, CA (US);
Lin Chen, San Jose, CA (US);
Ziwei Yu, Cupertino, CA (US);
Xiaobin Wang, San Jose, CA (US);
Zhiqiang Niu, Santa Clara, CA (US);
Kuan-Hung Li, Zhubei, TW;
ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP, Toronto, CA;
Abstract
A semiconductor package comprises a first device and a second device. The structure of the first semiconductor device is similar to that of the second semiconductor device. The first semiconductor device comprises a lead frame strip, a first plurality of field effect transistors (FETs), a first plurality of clips, a second plurality of FETs, a second plurality of clips, and a first molding encapsulation. A method is applied to fabricate a plurality of semiconductor packages. The method comprises the steps of providing a lead frame strip, attaching a first plurality of FETs, attaching a first plurality of clips, attaching a second plurality of FETs, attaching a second plurality of clips, and forming a molding encapsulation.