The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Aug. 23, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Choong Bin Yim, Suwon-si, KR;

Ji Yong Park, Suwon-si, KR;

Jong Bo Shim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/05 (2026.01); H10B 80/00 (2023.01); H10W 70/60 (2026.01); H10W 70/65 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 72/20 (2026.01);
U.S. Cl.
CPC ...
H10W 70/093 (2026.01); H10B 80/00 (2023.02); H10W 70/60 (2026.01); H10W 70/65 (2026.01); H10W 74/01 (2026.01); H10W 74/016 (2026.01); H10W 74/111 (2026.01); H10W 90/00 (2026.01); H10W 90/701 (2026.01); H10W 72/07252 (2026.01); H10W 72/221 (2026.01); H10W 90/722 (2026.01); H10W 90/724 (2026.01);
Abstract

A semiconductor package includes a first package substrate having a first area and a second area that is distinct and separate from the first area, a first connection element disposed on the first area and having a first thickness, a first semiconductor chip connected to the first connection element, a second connection element disposed on the second area and having a second thickness that is greater than the first thickness, a third connection element disposed on the second connection element and electrically connected to the second connection element, a second package substrate disposed on the third connection element, and a second semiconductor chip disposed on the second package substrate.


Find Patent Forward Citations

Yim, Choong. (2026). Semiconductor package having a package substrate including a first area and a second area and method of fabricating the same (U.S. Patent No. 12677675). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12677675

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…