Integrating standard-gate transistors and extended-gate transistors on the same substrate using low-temperature gate dielectric treatments

Abstract

Embodiments of the invention are directed to a method of fabricating an integrated circuit (IC). The method includes performing fabrication operations to form an extended-gate field effect transistor (EG-FET) on a substrate. The fabrication operations include forming a channel in an EG region of the substrate. A first EG gate dielectric is deposited over the channel at a first low-temperature. A reinforcement treatment is applied to the first EG gate dielectric at a second low-temperature, wherein the reinforcement treatment converts the first EG gate dielectric to a reinforced first EG gate dielectric. The first low-temperature is selected to be below the second low-temperature; and the second low-temperature is selected to be below a third low-temperature that causes a diffusion of a first type of semiconductor material across an interface and into a second type of semiconductor to exceed a predetermined minimum diffusion level or rate.