The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Oct. 03, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kung-Pin Chang, Nantou Township, Nantou County, TW;

Yi-Ting Lin, Hsinchu City, TW;

Wen-Chiang Hong, Taipei City, TW;

Yao-Kwang Wu, Hsinchu, TW;

Jyh-Huei Chen, Hsinchu City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10P 50/00 (2026.01); H10P 50/28 (2026.01);
U.S. Cl.
CPC ...
H10D 30/031 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6757 (2025.01); H10P 50/283 (2026.01); H10P 50/73 (2026.01); H10D 30/6735 (2025.01);
Abstract

A method for forming a semiconductor device structure is provided. The method includes providing a substrate and a nanostructure stack. The method includes forming an isolation layer over the base and surrounding the fin. The method includes forming a first protection layer over the nanostructure stack and the isolation layer. The method includes forming a second protection layer over the first protection layer. The method includes forming a mask layer over the second protection layer. The top portion of the second protection layer protrudes from the mask layer. The method includes thinning the top portion of the second protection layer. The method includes removing the mask layer. The method includes removing the first protection layer and the second protection layer over the nanostructure stack. The method includes forming a gate stack wrapped around the nanostructure stack.


Find Patent Forward Citations

Chang, Kung-Pin. (2026). Method for forming semiconductor device structure with protection layer (U.S. Patent No. 12677433). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12677433

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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