The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Mar. 20, 2024
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventor:

Vinod Kumar, Uttar Pradesh, IN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); H04L 25/49 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03038 (2013.01); H04L 25/03343 (2013.01); H04L 25/4917 (2013.01);
Abstract

Embodiments included herein are directed towards a feed forward equalization (FFE) transmission circuit. The circuit may include a data serializer and data signal generator circuit and a most significant bit driver slice circuit configured to receive a first output from the data serializer and data signal generator circuit. The FFE transmission circuit may further include a least significant bit driver slice circuit configured to receive a second output from the data serializer and data signal generator circuit and a hybrid emphasis equalization slice circuit configured to receive a third output from the data serializer and data signal generator circuit.


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