The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2026
Filed:
Jul. 16, 2024
Magnachip Semiconductor, Ltd., Cheongju-si, KR;
Hyoungkyu Kim, Cheongju-si, KR;
Sangho Lee, Cheongju-si, KR;
MagnaChip Semiconductor, Ltd., Cheongju-si, KR;
Abstract
A buffer circuit includes an input stage configured to provide a differential current to a load stage or receive the differential current from the load stage based on a difference between an input voltage and an output voltage, wherein the load stage is configured to apply gate voltages to first and second output transistors of an output stage, and wherein the output stage is configured to regulate the output voltage; a slew rate compensation circuit configured to provide a slew rate compensation current to the load stage or receive the slew rate compensation current from the load stage; an offset control signal output stage configured to output an offset control signal by being applied with first and second N-bit control signals; and an offset blocking circuit comprising a switch configured to turn off a current source of the slew rate compensation circuit by the offset control signal.