The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2026
Filed:
Sep. 12, 2024
Northrop Grumman Systems Corporation, Falls Church, VA (US);
The Regents of the University of California, Oakland, CA (US);
Shashank Bansal, La Jolla, CA (US);
Bouchaib Cherif, Somers, NY (US);
Gert Cauwenberghs, San Diego, CA (US);
Gopabandhu Hota, Palo Alto, CA (US);
Soumil Jain, Redwood City, CA (US);
NORTHROP GRUMMAN SYSTEMS CORPORATION, Falls Church, VA (US);
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Oakland, CA (US);
Abstract
The capacitively-coupled static random access memory (SRAM-C) compute-in-memory (CIM) circuit includes at least one static random access memory (SRAM) configured to store a bit value, at least one capacitively-coupled (CC) circuit coupled to at least one SRAM, and an energy recovery logic (ERL) driver configured to recover signal energy by utilizing a ramped sinusoidal hot clock. The CC circuit includes a first and second capacitors, a first pair, a second pair, a third pair, a fourth pair of transistors. Each pair of transistors include a first and second transistors coupled to one another. the first capacitor is coupled to the first and second pairs of transistors and the second capacitor is coupled to the third and fourth pairs of transistors. The SRAM-C CIM circuit enhances efficiency and effectiveness of multiply-and-accumulate (MAC) operations of the SRAM-C CIM circuit.