The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Jun. 24, 2024
Applicant:

Center for Deep Learning IN Electronics Manufacturing, Inc., San Jose, CA (US);

Inventors:

Suhas Pillai, San Jose, CA (US);

Thang Nguyen, San Jose, CA (US);

Ajay Baranwal, Dublin, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 7/30 (2017.01); G06N 3/04 (2023.01);
U.S. Cl.
CPC ...
G06T 7/30 (2017.01); G06N 3/04 (2013.01); G06T 2207/10061 (2013.01); G06T 2207/20081 (2013.01); G06T 2207/20084 (2013.01);
Abstract

Systems for training a convolutional neural network to register images for masks or wafers in semiconductor manufacturing include a computer processor configured to receive a first pair of images aligned in a first modality and a second pair of images aligned in a second modality. Images in the first pair of images and the second pair of images are a computer aided design (CAD) image pre-aligned with a scanning electron microscope (SEM) image. An affine transformation is generated with a convolutional neural network, using one image from the first pair of images and one image from the second pair of images. The one image from the first pair of images is in the first modality and the one image from the second pair of images is in the second modality. Systems for registering images for masks or wafers in semiconductor manufacturing use the trained convolutional neural network.


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