The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Oct. 23, 2024
Applicant:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Inventors:

Satheesh Chellappan, El Dorado Hills, CA (US);

Raghunandan Chaware, Sunnyvale, CA (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 13/28 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1668 (2013.01); G06F 13/28 (2013.01); G06F 13/4282 (2013.01);
Abstract

A system and method for providing a neural network model to an artificial intelligence (AI) field programmable gate array (FPGA) are provided. A flash memory stores a neural network model. A tunnel is created between a flash memory and a random access memory (RAM) over a multi-line serial peripheral interface (QSPI) interface. Using the tunnel, the RAM reads one or more layers of the neural network model from the flash memory and writes the one or more layers into pages in the RAM. The AI FPGA reads the one or more layers of the neural network model from the RAM over a wide input/output interface and executes the one or more layers.


Find Patent Forward Citations

Loading…