The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Jan. 28, 2021
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Daichi Niwa, Kyoto, JP;

Koshun Saito, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 42/00 (2026.01); H10W 70/40 (2026.01); H10W 72/00 (2026.01); H10W 72/50 (2026.01); H10W 72/59 (2026.01); H10W 72/90 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 42/121 (2026.01); H10W 70/417 (2026.01); H10W 70/457 (2026.01); H10W 70/465 (2026.01); H10W 70/481 (2026.01); H10W 74/111 (2026.01); H10W 72/07552 (2026.01); H10W 72/527 (2026.01); H10W 72/5363 (2026.01); H10W 72/5524 (2026.01); H10W 72/59 (2026.01); H10W 72/952 (2026.01); H10W 90/756 (2026.01);
Abstract

A semiconductor device includes a substrate, a semiconductor element, a connection pad, a plated layer, a wire, and an encapsulation resin. The substrate includes a main surface. The semiconductor element is mounted on the main surface and includes a main surface electrode. The connection pad is formed of Cu, arranged with respect to the substrate, separated from the substrate, and includes a connection surface. The plated layer is formed of Ni and partially covers the connection surface. The wire is formed of Al and bonded to the main surface electrode and the plated layer. The encapsulation resin encapsulates the semiconductor element, the connection pad, the plated layer, and the wire.


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