The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2026

Filed:

May. 26, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kaochao Chen, Hsinchu City, TW;

Chia-Cheng Ho, Hsinchu City, TW;

Chan-Yu Hung, Tainan City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/40 (2026.01); H10D 1/68 (2025.01); H10D 84/00 (2025.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
H10W 20/496 (2026.01); H10D 1/692 (2025.01); H10D 84/212 (2025.01); H10W 20/435 (2026.01);
Abstract

Some embodiments relate to an integrated circuit including a semiconductor substrate. A silicide structure is disposed over the semiconductor substrate in a cross-sectional view. A dielectric structure is in direct contact with an upper surface of the silicide structure in the cross-sectional view. A metal structure is in direct contact with an upper surface of the dielectric layer in the cross-sectional view, such that the silicide structure and the metal structure establish a bottom electrode and a top electrode, respectively, which are spaced apart from one another by the dielectric structure to establish a metal-insulator-silicide capacitor over the semiconductor substrate.


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