The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2026
Filed:
Jun. 30, 2022
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 15/00 (2026.01); H10D 30/01 (2025.01); H10D 86/00 (2025.01); H10D 86/01 (2026.01); H10P 90/00 (2026.01); H10W 10/00 (2026.01); H10W 10/10 (2026.01); H10W 10/17 (2026.01); H10W 20/00 (2026.01); H10W 20/20 (2026.01); H10W 20/40 (2026.01);
U.S. Cl.
CPC ...
H10W 15/00 (2026.01); H10D 30/024 (2025.01); H10D 86/011 (2025.01); H10D 86/215 (2025.01); H10P 90/1906 (2026.01); H10P 90/1908 (2026.01); H10W 10/014 (2026.01); H10W 10/061 (2026.01); H10W 10/17 (2026.01); H10W 10/181 (2026.01); H10W 15/01 (2026.01); H10W 20/083 (2026.01); H10W 20/20 (2026.01); H10W 20/40 (2026.01);
Abstract
A method of forming a semiconductor device includes forming a wafer having an ion-implanted silicon layer, wherein the ion-implanted silicon layer is disposed between a first insulator layer and a second insulator layer inside the wafer; forming an active region over the ion-implanted silicon layer; forming an active device in the active region; and forming a conductive via to couple the ion-implanted silicon layer and the active device.